4 Commits

Author	SHA1	Message	Date
Marco Cetica	1b207add8c	Refactoring assembly entry point	2021-02-03 15:59:42 +01:00
Cetica Marco	21f017f13c	Added time RTC library	2021-01-02 17:49:15 +01:00
ice-bit	bb78281aaf	Added ISRs and IRQs drivers and set up all interrupts in assembly, however the does not work, yet	2019-07-05 18:25:58 +02:00
ice-bit	1aa6963e84	Added IDT driver	2019-07-05 12:32:04 +02:00