Refactoring assembly entry point
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@@ -1,41 +1,41 @@
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/**************************************
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* VulcanOS Kernel *
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* Developed by Marco 'icebit' Cetica *
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* (c) 2019-2021 *
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* Released under GPLv3 *
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* https://github.com/ice-bit/iceOS *
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***************************************/
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#ifndef _TIMER_H_
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#define _TIMER_H_
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#include <stdint.h>
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/*
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* The PIT(Programmable Interval Timer) is a chip that consist of an oscillator
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* It's connected to IRQ0 and it can be configure at a user-defined rate
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* between 10.Hz to 1.1931 MHz. The PIT is the primary method used to implement
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* a system clock and for implement multitasking.
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* The PIT's internal clock(~1.1931 MHz) is fed through a frequency divider that
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* modulate the final signal. This chip has 3 channel, each with his own
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* frequency divider:
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* Channel 0: The most useful, it's output is connected to IRQ0
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* Channel 1: It were used to control refresh rates on DRAM(RAMs with capacitors)
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* Channel 2: Controls the PC speakers.
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*
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* In our case, we will use only channel 0.
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* So we have to set up PIT at a frequency 'f', so it interrupts us at regular
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* intervals. We'll set the frequency to 100Hz(once every 10 ms); to do this
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* we'll send the PIT a divisor that will be divided for it's input frequency.
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* E.g. -> divisor = 1193180 Hz(1.1931MHz) / 100 Hz
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*
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* Apart of that, the PIT has 4 registers: 0x40-0x42(data ports) and 0x43(command port)
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*/
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void init_timer(uint32_t frequency);
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extern uint32_t tick;
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/* Since regs parameter(from timer_callback) will be unused
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* GCC(with -Werror flag) will throw an error, so we can avoid this
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* using the following macro
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*/
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#define UNUSED_PAR(x) (void)(x)
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#endif
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/*****************************************
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* VulcanOS Kernel *
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* Developed by Marco 'icebit' Cetica *
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* (c) 2019-2021 *
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* Released under GPLv3 *
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* https://github.com/ice-bit/vulcanos *
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*****************************************/
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#ifndef _TIMER_H_
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#define _TIMER_H_
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#include <stdint.h>
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/*
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* The PIT(Programmable Interval Timer) is a chip that consist of an oscillator
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* It's connected to IRQ0 and it can be configure at a user-defined rate
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* between 10.Hz to 1.1931 MHz. The PIT is the primary method used to implement
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* a system clock and for implement multitasking.
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* The PIT's internal clock(~1.1931 MHz) is fed through a frequency divider that
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* modulate the final signal. This chip has 3 channel, each with his own
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* frequency divider:
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* Channel 0: The most useful, it's output is connected to IRQ0
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* Channel 1: It were used to control refresh rates on DRAM(RAMs with capacitors)
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* Channel 2: Controls the PC speakers.
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*
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* In our case, we will use only channel 0.
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* So we have to set up PIT at a frequency 'f', so it interrupts us at regular
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* intervals. We'll set the frequency to 100Hz(once every 10 ms); to do this
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* we'll send the PIT a divisor that will be divided for it's input frequency.
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* E.g. -> divisor = 1193180 Hz(1.1931MHz) / 100 Hz
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*
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* Apart of that, the PIT has 4 registers: 0x40-0x42(data ports) and 0x43(command port)
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*/
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void init_timer(uint32_t frequency);
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extern uint32_t tick;
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/* Since regs parameter(from timer_callback) will be unused
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* GCC(with -Werror flag) will throw an error, so we can avoid this
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* using the following macro
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*/
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#define UNUSED_PAR(x) (void)(x)
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#endif
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