2019-07-05 18:25:58 +02:00
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; iceOS Kernel ;
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; Developed by Marco 'icebit' Cetica ;
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; (c) 2019 ;
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; Released under GPLv3 ;
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; https://github.com/ice-bit/iceOS ;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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extern isr_handler ; Defined in drivers/isr.h
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extern irq_handler ; Defined in drivers/isr.h
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; Let's implement all ISR in a very handy way
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%macro ISR_NOERRCODE 1
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global isr%1
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isr%1:
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cli ; Disable interrupts
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push byte 0 ; Push dummy error code
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2019-07-05 21:12:18 +02:00
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push byte %1 ; Push interrupt number
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2019-07-05 18:25:58 +02:00
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jmp isr_common ; goto ISR handler
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%endmacro
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%macro ISR_ERRCODE 1
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global isr%1
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isr%1:
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cli ; Disable interrupts
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push byte %1 ; Push interrupt number
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jmp isr_common ; goto ISR handler
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%endmacro
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; Now we have to do the same thing for Interrupt Requests,
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; in this case the first parameter is the IRQ number while
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; the second one is the ISR number to be remapped to
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%macro IRQ 2
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global irq%1
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irq%1:
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cli ; Disable interrupts
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push byte 0 ; Push dummy error code
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push byte %2 ; Push interrupt number
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jmp irq_common ; goto IRQ handler
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%endmacro
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; isr_common is a common handler for all
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; Interrupt Service Routines declared in the system
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; It's main scope is to save current register's states
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; into the stack, call the C high level handler
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; and restore the register's original values from
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; the stack
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isr_common:
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;; Save register's content into the stack ;;
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pusha ; Push edi,esi,ebp,esp,ebx,edx,ecx,eax
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mov ax, ds ; Get 16 bits of eax(e.g ds)
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push eax
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mov ax, 0x10 ; Load the kernel data segment descriptor
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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;; Call C handler ;;
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call isr_handler ; Call C handler
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;; Restore register's content from the stack ;;
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pop eax ; Restore original data segment selector
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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popa ; Pop edi,esi,ebp,esp,ebx,edx,ecx,eax
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add esp, 8 ; Cleans up pushed error code and ISR number
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sti ; Re-enable interrupts
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iret ; Pops 5 things: CS, EIP, EFLAGS, SS and ESp
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; irq_common is a common handler for all
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; Interrupt Requests, it's very similar to the
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; ISR one
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irq_common:
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;; Save register's content into the stack ;;
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pusha ; Push edi,esi,ebp,esp,ebx,edx,ecx,eax
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mov ax, ds ; Get 16 bits of eax(e.g ds)
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push eax
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mov ax, 0x10 ; Load the kernel data segment descriptor
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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;; Call C handler ;;
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call irq_handler ; Call C handler
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;; Restore register's content from the stack ;;
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pop ebx ; Restore original data segment selector
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mov ds, bx
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mov es, bx
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mov fs, bx
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mov gs, bx
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popa ; Pop edi,esi,ebp,esp,ebx,edx,ecx,eax
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add esp, 8 ; Cleans up pushed error code and ISR number
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sti ; Re-enable interrupts
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iret ; Pops 5 things: CS, EIP, EFLAGS, SS and ESp
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; Standard x86 ISRs (only 8,10-14 and 17 requires to push error codes to the stack)
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ISR_NOERRCODE 0
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ISR_NOERRCODE 1
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ISR_NOERRCODE 2
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ISR_NOERRCODE 3
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ISR_NOERRCODE 4
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ISR_NOERRCODE 5
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ISR_NOERRCODE 6
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ISR_NOERRCODE 7
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ISR_ERRCODE 8
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ISR_NOERRCODE 9
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ISR_ERRCODE 10
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ISR_ERRCODE 11
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ISR_ERRCODE 12
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ISR_ERRCODE 13
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ISR_ERRCODE 14
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ISR_NOERRCODE 15
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ISR_NOERRCODE 16
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2019-07-10 18:19:45 +02:00
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ISR_NOERRCODE 17
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2019-07-05 18:25:58 +02:00
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ISR_NOERRCODE 18
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ISR_NOERRCODE 19
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ISR_NOERRCODE 20
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ISR_NOERRCODE 21
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ISR_NOERRCODE 22
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ISR_NOERRCODE 23
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ISR_NOERRCODE 24
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ISR_NOERRCODE 25
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ISR_NOERRCODE 26
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ISR_NOERRCODE 27
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ISR_NOERRCODE 28
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ISR_NOERRCODE 29
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ISR_NOERRCODE 30
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ISR_NOERRCODE 31
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IRQ 0, 32
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IRQ 1, 33
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IRQ 2, 34
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IRQ 3, 35
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IRQ 4, 36
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IRQ 5, 37
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IRQ 6, 38
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IRQ 7, 39
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IRQ 8, 40
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IRQ 9, 41
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IRQ 10, 42
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IRQ 11, 43
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IRQ 12, 44
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IRQ 13, 45
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IRQ 14, 46
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2019-07-10 18:19:45 +02:00
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IRQ 15, 47
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